| (PCINT5/RESET/ADC0/dW) PB5 | 1 • | 8 | Vcc |
| (PCINT3/CLKI/ADC3) PB3 | 2 | 7 | PB2 (SCK/ADC1/T0/PCINT2) |
| (PCINT4/ADC2) PB4 | 3 | 6 | PB1 (MISO/AIN1/OC0B/INT0/PCINT1) |
| GND | 4 | 5 | PB0 (MOSI/AIN0/OC0A/PCINT0) |
| Pin | Symbol | Description |
|---|---|---|
| 1 | (PCINT5/RESET/ADC0/dW) PB5 | reset (active low); port B |
| 2 | (PCINT3/CLKI/ADC3) PB3 | external clock input; port B |
| 3 | (PCINT4/ADC2) PB4 | port B |
| 4 | GND | ground |
| 5 | PB0 (MOSI/AIN0/OC0A/PCINT0) | SPI master output/slave input; port B |
| 6 | PB1 (MISO/AIN1/OC0B/INT0/PCINT1) | SPI master input/slave output; port B |
| 7 | PB2 (SCK/ADC1/T0/PCINT2) | SPI master clock; port B |
| 8 | Vcc | supply voltage |
| Parameter | Value | Unit |
|---|---|---|
| Flash memory | 1K | bytes |
| Internal SRAM | 64 | bytes |
| EEPROM | 64 | bytes |
| Programmable I/O lines | 6 | |
| Maximum clock frequency | 10 | MHz |
Note: Data is maintained by an independent source and accuracy is not guaranteed. Check with the manufacturer's datasheet for up-to-date information.